A capacitor mismatch calibration scheme for SAR ADC based on genetic algorithm

Abstract

Abstract Capacitor mismatch problem due to process variation causes weight error, which deteriorates the linearity of SAR ADC. In this paper, a novel calibration scheme based on genetic algorithm(GA) combined with a radix‐less‐than‐2 SAR ADC is proposed to extract the weight error caused by capacitor mismatch. This is a foreground calibration scheme and no extra injections are added. The proposed GA‐based calibration scheme is simulated based on 40 nm CMOS technology. After calibration, ENOB increases from 10.19 bits to 11.46 bits, INL changes from +2.22/−2.12 LSB to +0.81/−0.80 LSB, and DNL changes from +1.79/−1.00 LSB to +0.99/−1.00LSB. As can be seen from the simulation results, the proposed calibration scheme can effectively improve the linearity deterioration caused by capacitor mismatch.

Keywords

• analogue‐digital conversion
• calibration
• capacitors