Impact of III-Nitride/Si Interface Preconditioning on Breakdown Voltage in GaN-on-Silicon HEMT

Abstract

In this paper, an AIGaN/GaN metal-oxide-semiconductor high-electron-mobility transistor (MOS-HEMT) device is realized. The device shows normal ON characteristics with a maximum current of 570 mA/mm at a gate-to-source voltage of 3 V, an on-state resistance of 7.3 Ω·mm and breakdown voltage of 500 V. The device has been modeled using numerical simulations to reproduce output and transfer characteristics. We identify, via experimental results and TCAD simulations, the main physical mechanisms responsible for the premature breakdown. The contribution of the AlN/Silicon substrate interface to the premature off-state breakdown is pointed out. Vertical leakage in lateral GaN devices significantly contributes to the off-state breakdown at high blocking voltages. The parasitic current path leads to premature breakdown before the appearance of avalanche or dielectric breakdown. A comparative study between a MOS-HEMT GaN on a silicon substrate with and without a SiNx interlayer at the AlN/Silicon substrate interface is presented here. We show that it is possible to increase the breakdown voltages of the fabricated transistors on a silicon substrate using SiNx interlayer.

Keywords

• GaN
• HEMT
• parasitic current path
• high voltage breakdown