E3S Web of Conferences (Jan 2018)

Influence of Parasitic Inductances on Switching Performance of SiC MOSFET

  • Li Jinyuan,
  • Cui Meiting,
  • Du Yujie,
  • Ke Junji,
  • Zhao Zhibin

DOI
https://doi.org/10.1051/e3sconf/20186404005
Journal volume & issue
Vol. 64
p. 04005

Abstract

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Compared to the silicon power devices, silicon carbide device has shorter switch time. Hence, as a result of the faster transition of voltage (dv/dt) and current (di/dt) in SiC MOSFET, the influence of parasitic parameters on SiC MOSFET’s switching transient is more serious. This paper gives an experimental study of the influence of parasitic inductance on SiC MOSFET’s switching characteristics. Most significance parameters are the parasitic inductances of gate driver loop and power switching loop. These include the SiC MOSFET package’s parasitic inductance, interconnect inductance and the parasitic inductance of dc link PCB trace. This paper therefore focuses on analysis and comparison of different parasitic parameters under various operation conditions in terms of their effect on overvoltage, overcurrent and switching power loss.