IET Electric Power Applications (Sep 2022)

Design and implementation of a fault detection method for a PV‐fed DC‐microgrid with power control mechanism

  • Muhammad Zakir,
  • Ammar Arshad,
  • Hadeed Ahmed Sher,
  • Ahmed Al‐Durra

DOI
https://doi.org/10.1049/elp2.12212
Journal volume & issue
Vol. 16, no. 9
pp. 1057 – 1071

Abstract

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Abstract This paper presents practical implementation of a fault detection, localisation, and categorisation (FDLC) method in PV‐fed DC‐microgrid (DCMG). The DCMG is implemented by utilising a group of two DC nanogrids (DCNG) that have power control mechanism (PCM). The FDLC uses a voltage calculating circuit comprising a single voltage sensor and diode network. Moreover, the architecture is based on six statements extracted from the investigation of line to line (L–L) and line to ground (L–G) faults at a DCNG of the cluster. The PCM in the proposed system utilises a power triggering circuit for effective power flow among the different units of the DCNG considering the load demands and the resource availability. Experimentation is carried out by creating L–L/L–G faults at different points in the DCMG. Detection, localisation, and classification of faults is performed by utilising the sensor's voltage and power of the individual DCNG. FDLC offers less computational burden, perform fast detection of fault, and is capable of distinguishing between the L–L/L–G faults and uniform irradiance and partial shading conditions in the PV‐array. The proposed FDLC technique and its six statements are verified through experimental results.

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