Dianzi Jishu Yingyong (Jan 2018)

VPX time unified system design based on FPGA

  • Wang Zhen,
  • Li Jianhong,
  • Zhang Dasong,
  • Wang Xiaonan,
  • Huang Yilong

DOI
https://doi.org/10.16157/j.issn.0258-7998.172617
Journal volume & issue
Vol. 44, no. 1
pp. 65 – 67

Abstract

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IRIG-B time code(B code) becomes the suitable standard code for time system equipment because of its superior capacity, simple implementation and easy deployment. IRIG-B code time system is used for time information transfer and time synchronization between different ranges in the shooting range system. However, with the development of large-scale integrated circuit and PLD,and with the enhancement of acquiring of integrability and programmability for timing equipment, conventional time unified system cannot meet the requirement. In order to solve those problems, we put forward a VPX time unified system design based on FPGA, which has the characters of high reliability and integrability, high operability and scalability, and small volume as well. In addition, the design implemented in this paper could support more applications.

Keywords