npj Flexible Electronics (Jan 2025)

An ultra-low power wake-Up timer compatible with n-FET based flexible technologies

  • D. Narbón,
  • J. L. Soler-Fernández,
  • A. Santos,
  • P. Barquinha,
  • R. Martins,
  • A. Diéguez,
  • J. D. Prades,
  • O. Alonso

DOI
https://doi.org/10.1038/s41528-024-00374-4
Journal volume & issue
Vol. 9, no. 1
pp. 1 – 13

Abstract

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Abstract Flexible integrated circuits (FlexICs) have drawn increasing attention, particularly in remote sensors and wearables operating in a limited power budget. Here, we present an ultra-low power timer designed to wake-up an external circuit periodically, from a deep-sleep state into an active state, thereby largely reducing the system power consumption. We achieved this with a circuit topology that exploits the transistor’s leakage current to generate a low frequency wake-up signal. This topology is compatible with IC technologies where only n-type transistors are available. The design was implemented with the sustainable FlexIC process of PragmatIC, that is based on Indium Gallium Zinc Oxide (IGZO) thin-film transistors. Our timer generates mean wake-up frequency of 0.24 ± 0.15 Hz, with a mean power consumption of 26.7 ± 14.1 nW. In this paper, we provide details of the Wake-Up timer’s design and performance at different supply voltages, under temperature variations and different light conditions.