Alexandria Engineering Journal (Dec 2024)
Multiple patterning bi-line/tri-line structure at limiting resolution for 7 nm by negative tone development of ArF immersion lithography
Abstract
Since the advanced Integrated Circuit (IC) manufacturing process has reached the 14 nm technology node and beyond, the pattern size of integrated circuits has become much smaller than the theoretical minimum resolution of lithography. In order to further extend the performance of immersion lithography, the industry introduces Multiple Patterning Technology (MPT) and Negative Tone Development (NTD) lithography technology. MPT and NTD lithography have greatly improved the process window of immersion lithography, enabling ArF immersion lithography to extend to 7 nm or even 5 nm technology nodes and below. However, MPT still has limited ability to improve the process window for some special patterns. For example，for the poly gate process in Front End of Line (FEOL) or the metal routing process in Back End of Line (BEOL), IC design often uses a special kind of patterns, such as the bi-line or tri-line structures. Due to the fact that some type of the bi-line/tri-line structures have a semi-dense pattern on each side, the process window of these patterns are relatively narrow, making them difficult to manufacture. This paper focuses on the patterning technology scheme of bi-line/tri-line structures in IC design under the diffraction limit of 193 nm immersion lithography. This paper explores the solution for bi-line/tri-line patterns through mask split strategy and NTD lithography process simulation with a physical model, including illumination conditions, Optical Proximity Correction (OPC) methods, and photoresist process parameter design. This study provides a reference scheme for subsequent NTD process development and patterning technology, as well as a reference idea for IC design methods.
