Design of a Digital Array Signal Processing System with Full Array Element

Abstract

For the application of a digital array signal processing system with a high sampling rate and large bandwidth, and considering the constraints of limited resources (performance, volume, power consumption, weight, etc.), this paper proposes a design and implementation method of broadband digital array signal processing system based on radio frequency system on a chip. The system focuses on multi-channel synchronization under a high sampling rate and multi-channel amplitude and phase calibration under large bandwidth to form an all-digital, low-power, multi-channel, high-speed, large bandwidth hardware platform suitable for broadband digital array signal processing. Through the implementation of the Multiple-Input Multiple-Output phased-array digital beamforming algorithm, the test conducted verifies that the system has superior signal processing performance of the broadband digital array.

Keywords

• radio frequency system on chip
• high sampling rate
• large bandwidth
• digital array