IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Jan 2021)

CiM3D: Comparator-in-Memory Designs Using Monolithic 3-D Technology for Accelerating Data-Intensive Applications

  • Akshay Krishna Ramanathan,
  • Srivatsa Srinivasa Rangachar,
  • Hariram Thirucherai Govindarajan,
  • Je-Min Hung,
  • Chun-Ying Lee,
  • Cheng-Xin Xue,
  • Sheng-Po Huang,
  • Fu-Kuo Hsueh,
  • Chang-Hong Shen,
  • Jia-Min Shieh,
  • Wen-Kuan Yeh,
  • Mon-Shu Ho,
  • Jack Sampson,
  • Meng-Fan Chang,
  • Vijaykrishnan Narayanan

DOI
https://doi.org/10.1109/JXCDC.2021.3087745
Journal volume & issue
Vol. 7, no. 1
pp. 79 – 87

Abstract

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The compare operation is widely used in many applications, from fundamental sorting to primitive operations in the database and AI systems. We present SRAM-based 3-D-CAM circuit designs using a monolithic 3-D (M3D) integration process for realizing beyond-Boolean in-memory compare operation without any area overheads. We also fabricated a processing-in-memory (PiM) macro with the same 3-D-CAM circuit using M3D for performing massively parallel compare operations used in the database, machine learning, and scientific applications. We show various system designs with the 3-D-CAM supporting operations, such as data filtering, sorting, and sparse matrix–matrix multiplication (SpGEMM). Our systems exhibit up to $272\times $ , $200\times $ , and $226\times $ speedups and $151\times $ , $37\times $ , and $156\times $ energy savings compared to systems using near memory compute for the data filtering, sorting, and SpGEMM applications, respectively.

Keywords