10Gb/s Bang-Bang Clock and Data Recovery (CDR) for optical transmission systems

Abstract

A Bang-Bang Clock-Data Recovery (CDR) for 10Gb/s optical transmission systems is presented. A direct modulated architecture is used for the design. Its loop characteristics can be derived using an analogy to Σ Δ theory. The circuit was produced and measured in a commercial 0.25μm BiCMOS technology with a transition frequency fT70=GHz.