Using the residue number system with moduli of {2n −1,2n ,2n +1} type to reduce the hardware costs of the digital filter

Abstract

Background. The low performance of digital filtering devices is the main problem for solving practical problems of digital signal processing. One of the ways to improve the performance of such devices is parallel signal processing using residue number system arithmetic. Materials and methods. The article proposes architectures of a truncated multiply and accumulate unit and converters for calculating modulo 2n +1. A method for filtering digital filter signals with a finite impulse response using truncated multiply and accumulate unit in residue number system with moduli of a special type {2n −1, 2n ,2n +1} was also proposed. Results. The use of moduli {2n −1, 2n ,2n +1} makes it possible to reduce hardware costs compared to moduli{2n −1,2n}. The results of hardware simulation showed that for a 32-bit filter in residue number system, the proposed moduli set allows reducing hardware costs to 32.5%, but at the same time, the delay increased to 16.4%. Conclusions. The results obtained open up the possibility of creating devices with low hardware costs.

Keywords

• digital signal processing
• digital filter
• residue number system
• multiply and accumulate unit
• hardware simulation