Chip (Sep 2024)

Statistical evaluation of 571 GaAs quantum point contact transistors showing the 0.7 anomaly in quantized conductance using cryogenic on-chip multiplexing

  • Pengcheng Ma,
  • Kaveh Delfanazari,
  • Reuben K. Puddy,
  • Jiahui Li,
  • Moda Cao,
  • Teng Yi,
  • Jonathan P. Griffiths,
  • Harvey E. Beere,
  • David A. Ritchie,
  • Michael J. Kelly,
  • Charles G. Smith

Journal volume & issue
Vol. 3, no. 3
p. 100095

Abstract

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The mass production and the practical number of cryogenic quantum devices producible in a single chip are limited to the number of electrical contact pads and wiring of the cryostat or dilution refrigerator. It is, therefore, beneficial to contrast the measurements of hundreds of devices fabricated in a single chip in one cooldown process to promote the scalability, integrability, reliability, and reproducibility of quantum devices and to save evaluation time, cost and energy. Here, we used a cryogenic on-chip multiplexer architecture and investigated the statistics of the 0.7 anomaly observed on the first three plateaus of the quantized conductance of semiconductor quantum point contact (QPC) transistors. Our single chips contain 256 split gate field-effect QPC transistors (QFET) each, with two 16-branch multiplexed source-drain and gate pads, allowing individual transistors to be selected, addressed and controlled through an electrostatic gate voltage process. A total of 1280 quantum transistors with nano-scale dimensions are patterned in 5 different chips of GaAs heterostructures. From the measurements of 571 functioning QFETs taken at temperatures T = 1.4 K and T = 40 mK, it is found that the spontaneous polarisation model and Kondo effect do not fit our results. Furthermore, some of the features in our data largely agreed with van Hove model with short-range interactions. Our approach provides further insight into the quantum mechanical properties and microscopic origin of the 0.7 anomaly in QFETs, paving the way for the development of semiconducting quantum circuits and integrated cryogenic electronics, for scalable quantum logic control, readout, synthesis, and processing applications.

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