Unveiling robust security: Chaotic maps for frequency hopping implementation in FPGA

Abstract

Frequency hopping is a main technique for wireless communication, avoiding interference and interception. This paper provides novel hardware design for frequency-hopping pseudorandom bit generator (PRBG).PRBG design by chaotic maps on FPGA.Two proposed methods in this work first combine chaotic maps in a cascade manner called fixed point cascade chaotic maps (FPCCM-FHSS), and second, the conjunction of chaotic maps done in an XORed manner called fixed point an XOR chaotic method (FPXORCM-FHSS).The results were the first eight NIST randomness tests.Frequency indicates that all p-values larger than 0.01 are needed to achieve better randomness,Second and third were die-hard tests, many distribution tests with significant p-values (p <0.01) that meet high standards of statistical randomness, making them suitable for channel security.Last were the FPGA results between the proposed methods for speed and hardware resources).The works implemented on XILINX ZC702 achieved 2 Gbps to meet the speed requirements of the change of the carrier frequency.

Keywords

• Frequency hopping
• Xilinx system generator
• Field programmable gate array
• Chaotic maps