A Three-Level GaN Driver for High False Turn-ON Tolerance With Minimal Reverse Conduction Loss

Abstract

This paper presents a three-level gate driver for GaN HEMTs (Gallium Nitride High Electron Mobility Transistors) for high false turn-on tolerance and low reverse conduction loss during both dead time at turn-on and turn-off. The proposed gate driver reduces the reverse conduction loss by clamping between the gate and source terminals only during dead time. It has a capacitor which works as a negative voltage source and prevents from the false turn-on phenomenon. It operates only with a single voltage source and a PWM (Pulse Width Modulation) output signal. The proposed gate driver is implemented on a 48V-to-12 V synchronous rectifier buck (SR-buck) converter and compared with other countermeasure methods for the false turn-on phenomenon. At the condition of 1 MHz, 30 ns dead time, and 120 W output power, the efficiencies of the proposed and conventional operations are 95.1% and 92.8% respectively. The margin between the threshold voltage and the peak of oscillated voltage of the proposed method becomes 1.3 times larger than that of the conventional method on average.

Keywords

• GaN HEMT
• gate driver
• three-level
• false turn-on
• reverse conduction loss
• dead time