Fast Pattern Recognition Through an LBP Driven CAM on FPGA

Abstract

This paper proposes a novel method for the design of a pattern recognition system based on an integrated approach of local binary patterns (LBP) and content-addressable memory (CAM), which utilizes the logical resources on a field-programmable gate array (FPGA) device. The proposed system uses LBP frequencies instead of pixel data in order to perform exact pattern matching. A logic-based CAM is used to achieve high searching speed. The proposed system is implemented on Xilinx Virtex-7 FPGA and has the ability to recognize patterns regardless of their size and type. The implementation results show that the worst-case lookup time of the proposed system for one complete recognized pattern is merely 1.05 μs, which is 37.12% lower compared with the state-of-the-art pattern recognition system.

Keywords

• Binary CAM
• fast pattern recognition
• field-programmable gate array (FPGA)
• local binary patterns
• performance improvement
• RAM-based CAM