A 10 MHz‐BW 85 dB‐SNDR 4th‐order sturdy MASH 2‐0 noise shaping SAR ADC with 2nd‐order gain‐error‐shaping technique

Abstract

Abstract The multi‐stage noise shaping (MASH) ΣΔ ADC has a good potential to achieve high‐order noise shaping (NS) and high resolution. However, it suffers from quantization noise leakage caused by the mismatch between the analogue NS filter and the digital cancellation filter, which greatly degrades the ADC performance. The sturdy MASH topology of the ΣΔ ADC can solve the leakage issue, but it cannot be implemented using the NS SAR ADC due to structural limitations. This paper proposes a sturdy MASH 2‐0 NS SAR to solve the noise leakage issue. The 4th‐order NS is achieved by only using a 2‐0 topology, which is hardware efficient. Instead of eliminating the first‐stage quantization error, the proposed sturdy MASH 2‐0 NS SAR shapes it, achieving better robustness to PVT variables. Furthermore, owing to the first‐stage 2nd‐order NS capability, the impairments of the residue amplifier, including the gain error and nonlinearity, are 2nd‐order shaped. The proposed 4th‐order sturdy MASH 2‐0 NS SAR is implemented in a 28 nm CMOS process, which achieves a SNDR of 85.6 dB and a SFDR of 101.3 dB with 10 MHz BW at OSR of 10, resulting in a Schreier FoM of 178.8 dB/179.4 dB (in SNDR/DR) with power consumption of 4.8 mW.

Keywords

• analogue–digital conversion
• digital‐analogue conversion
• sigma‐delta modulation