Design of current detection LDO regulator with silicon controlled rectifier based electrostatic discharge protection circuit to provide optimized voltage and power for system‐on‐chip applications

Abstract

Abstract Various levels of circuits and systems in the ultra‐low nanometer fabrication process should be considered to implement a system‐on‐chip (SOC) application to reduce power consumption. This letter is intended to propose a current detection structure that supplies and discharges additional current along the load current to provide the optimized voltage and power for SOC applications. The proposed electrostatic discharge (ESD) protection circuit placed on the power line and I/O has improved the reliability by preventing the direct or indirect destruction of the internal integrated circuit (IC) due to ESD. In addition, the proposed low drop out (LDO) regulator for the low‐voltage applications has combined an ESD protection circuit to secure the high reliability of the IC. The proposed LDO regulator is implemented with a 0.18‐μm BCD process and is kept an undershoot voltage of 23 mV and an overshoot voltage of 25 mV for a load current of 200 mA.