Dual PN Source/Drain Reconfigurable FET for Fast and Low-Voltage Reprogrammable Logic

Abstract

Schottky junction reconfigurable FETs suffer from limited output currents to drive the following stages, jeopardizing their viability for high-end applications. This drawback becomes dramatic at low voltages. In this work, an analogous novel low-bias reprogrammable device is presented. It features a dual PN doping at source and drain which improves the driving current density thanks to the presence of both electron and hole reservoirs within the same structure. 3D-TCAD results for this innovative device on advanced Silicon-on-Insulator technology are presented and compared with traditional reconfigurable FETs and CMOS structures.

Keywords

• Barrier
• dual doping
• fast logic
• low-bias
• polarity
• reconfigurable