Design of reverse converters for the general RNS 3-moduli set {2 k , 2 n  − 1, 2 n  + 1}

Abstract

Abstract This paper presents a new design method of the reverse (residue-to-binary) converter for the flexible 3-moduli residue number system (RNS) set $$\{ 2^k, 2^n-1, 2^n+1 \}$$ { 2 k , 2 n - 1 , 2 n + 1 } , where k and n are a pair of arbitrary integers $$\ge 2$$ ≥ 2 . The basic equation of the reverse converter is formulated in two alternative forms, each of which consists of two separate parts: one depending on input variables of the converter, and the other being a single constant. The constant can be either added inside the reverse converter or shifted out to the residue datapath channels, in most cases at no hardware cost or extra delay. From the set of basic functions, which are essentially different than those of the only two known general converters proposed for this moduli set, four versions of a converter can be designed for any pair of k and n. Experimental results obtained using the commercial 65-nm low-power design kit and industrial synthesis tools for all dynamic ranges from 8 to 40 bits suggest that, compared to the state-of-the-art designs, at least one version of the newly proposed converters is superior w.r.t. delay, power consumption, and area, for all dynamic ranges considered. The savings for the best versions (these with constants moved to the datapath channels) are up to 12.7% for the area and from 2.5% to 14% (5.8 % on average) for the delay, while the power consumption is reduced up to 23.2% (5.6% on average).

Keywords

• Application-specific integrated circuit (ASIC)
• Residue arithmetic
• Residue number system (RNS)
• Residue-to-binary converter
• Reverse converter