A Highly Resilient Fault Tolerant Topology of Single Phase Multilevel Inverter

Abstract

Low reliability of the inverter is caused by high failure rates of semiconductor components and capacitors as well as high requirements for these components in the design of multilevel inverter topologies. The primary challenges in the reported fault-tolerant topology solutions include high component count, handling single and multiple switch faults, handling open and short switch failures on all fault locations, and achieving natural voltage balancing of the capacitors. This paper proposes a highly resilient fault-tolerant topology to accomplish the above challenges without compromising efficiency during faulty conditions. The acquired experimental results verify the proposed topology’s robustness and efficacy. The proposed topology is evaluated by considering multiple instances of switch failures to encompass various fault locations and types. A comparison with the recently reported fault-tolerant MLI topologies verifies the superiority of the proposed topology.

Keywords

• Multilevel inverter
• capacitor voltage balancing
• single switch fault tolerance
• multiple switch fault tolerance
• reliability analysis