Measurement Approach to Evaluation of Ultra-Low-Voltage Amplifier ASICs

Abstract

This article presents measurement circuits and a test board developed for the experimental evaluation of prototype chip samples of the Fully Differential Difference Amplifier (FDDA). The Device Under Test (DUT) is an ultra low-voltage, high performance integrated FDDA designed and fabricated in 130nm CMOS technology. The power supply voltage of the FDDA is 400mV. The measurement circuits were implemented on the test board with the fabricated FDDA chip to evaluate its main parameters and properties. In this work, we focus on evaluation of the following parameters: the input offset voltage, the common-mode rejection ratio, and the power supply rejection ratio. The test board was developed and verified. The test board error was measured to be 38.73mV. The offset voltage of the FDDA was −0.66mV. The measured FDDA gain and gain bandwidth were 48dB and 550kHz, respectively. In addition to the measurement board, a graphical user interface was also developed to simplify the control of the device under test during measurements.

Keywords

• integrated circuit testing
• measurement board
• input offset voltage
• common-mode rejection ratio (cmrr)
• power supply rejection ratio (psrr)
• fully differential difference amplifier (fdda)