A 3.06 μm Single-Photon Avalanche Diode Pixel with Embedded Metal Contact and Power Grid on Deep Trench Pixel Isolation for High-Resolution Photon Counting
Jun Ogi,
Fumiaki Sano,
Tatsuya Nakata,
Yoshiki Kubo,
Wataru Onishi,
Charith Koswaththage,
Takeya Mochizuki,
Yoshiaki Tashiro,
Kazuki Hizu,
Takafumi Takatsuka,
Iori Watanabe,
Fumihiko Koga,
Tomoyuki Hirano,
Yusuke Oike
Affiliations
Jun Ogi
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Fumiaki Sano
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Tatsuya Nakata
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Yoshiki Kubo
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Wataru Onishi
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Charith Koswaththage
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Takeya Mochizuki
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Yoshiaki Tashiro
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Kazuki Hizu
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Takafumi Takatsuka
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Iori Watanabe
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Fumihiko Koga
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Tomoyuki Hirano
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
Yusuke Oike
Sony Semiconductor Solutions Corporation, Atsugi-shi 243-0014, Japan
In this study, a 3.06 μm pitch single-photon avalanche diode (SPAD) pixel with an embedded metal contact and power grid on two-step deep trench isolation in the pixel is presented. The embedded metal contact can suppress edge breakdown and reduce the dark count rate to 15.8 cps with the optimized potential design. The embedded metal for the contact is also used as an optical shield and a low crosstalk probability of 0.4% is achieved, while the photon detection efficiency is as high as 57%. In addition, the integration of a power grid and the polysilicon resistor on SPAD pixels can help to reduce the voltage drop in anode power supply and reduce the power consumption with SPAD multiplication, respectively, in a large SPAD pixel array for a high-resolution photon-counting image sensor.
