مهندسی مکانیک شریف (May 2018)
SPEED-UP NUMERICAL SOLUTION OF STEADY AND UNSTEADY FLOWS WITH FPGA HARDWARE
Abstract
Computational fluid dynamics (CFD) has been known as a technique that has massive floating point operations, since the most of its problems require a fine computational mesh with an appropriate distribution of grid points and also need sufficient numerical solution iterations to yield an accurate solution. As a result, even by employing supercomputers, the run time of these problems will still be significantly high. Several techniques and ideas have been suggested for reducing the run time of differential equations governing the fluid flow. In general, these methods are divided into two main categories, i.e., software and hardware methods. Based on recent studies, the computational power of FPGA (Field Programmable Gate Array) chips has shown a promising future for speeding up CFD computations. FPGA is an integrated circuit containing a number of logic blocks. The architecture of this hardware can be reprogrammed and configured after manufacturing. So, it is possible to design and implement complex circuits for various applications using an FPGA. The hardware used in this paper is SoC FPGA, which integrates both microprocessor and FPGA architectures into a single device. Consequently, they provide higher integration density, lower power consumption, smaller board size, and higher bandwidth communication between the processor and FPGA. In the present study, an algorithm is proposed that is tailored for configuring Xilinx Zynq-7000 family of chips. The ability of FPGAs in mathematical operations on floating point numbers is studied. Then, typical CFD problems, such as Laplace problem and unsteady coquette flow, are implemented and solved numerically on a specific FPGA hardware with different mesh sizes and numerical methods. The run time and precision results of the calculations are compared to the results from a conventional CPU. Some analytical solutions are used to validate the precision of the results. The calculation procedure on the FPGA hardware is up to ten times faster than calculations on the CPU, with the same data precision.
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