Trials of using Generative AI for APB UVM testbench generation

Abstract

As the production of electronics increases exponentially each year, the need for them to be able to function properly (according to the documentation) is critical. The functional verification process is a complex and time consuming step when delivering a proper System-On-a–Chip, which makes it a great candidate for different AI implementations and try-outs. In functional verification the UVM Methodology, where UVM stands for Universal Verification Methodology is vastly used combined with a hardware verification language such as System Verilog. Writing various, elaborated testbenches for difficult architectures such as RDMA (Remote Direct Memory Access), USB (Universal Serial Bus), etc. and achieving 100% functional coverage is laborious. Here, Generative AI may be able to help to improve this process by a considerable amount. This paper aims to present the different trials, aspects and challenges of producing an APB UVM testbench with Generative AI, using ChatGPT.

Keywords

• functional verification
• generative ai
• uvm
• systemverilog
• apb
• system-on-a-chip
• chatgpt