Enhancing Microgrid Protection With Impedance-Based Blocking: An Embedded Validation on a Dual-Layer Architecture

Abstract

Integrating microgrids has posed many challenges for distribution systems. Due to bidirectional power flow and intermittence of some renewable sources in microgrids, conventional protection methods are prone to failure. Aiming at improving them, this paper proposes a new blocking strategy to enhance dual-layer protection of the microgrid. The first layer contains the conventional overcurrent protection and the internal protection of the distributed energy resources (DERs). The second layer uses undervoltage logic and operates in the event of a possible failure or delayed operation of first-layer devices. As the undervoltage used in the second layer may present problems with selectivity losses, an impedance-based blocking strategy was proposed to mitigate it. Intelligent electronic devices close to the DERs receive voltage and current phasors, allowing the estimation of the impedance value used in the blocking strategy. The proposed protection scheme was firstly validated in a simulation environment using more than 10,000 simulated fault cases. Subsequently, an analysis was carried out on conventional and dual-layer protection with and without impedance blocking in a real-time hardware-in-the-loop test, where the proposed protection was embedded in hardware. The proposed approach not only outperformed conventional strategies in both analysis but also enhanced microgrid protection. Overall, the proposed dual-layer protection with impedance blocking reduced both the maximum clearing time and the occurrences of selectivity losses, while increasing the accuracy.

Keywords

• Hardware-in-the-loop
• impedance blocking
• microgrid protection
• overcurrent protection
• real-time simulation
• undervoltage protection