Journal of the Korean Institute of Electromagnetic Engineering and Science (Jan 2018)

Sensitivity Enhancement of a Vertical-Type CMOS Hall Device for a Magnetic Sensor

  • Sein Oh,
  • Byung-Jun Jang,
  • Hyungil Chae

DOI
https://doi.org/10.26866/jees.2018.18.1.35
Journal volume & issue
Vol. 18, no. 1
pp. 35 – 40

Abstract

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This study presents a vertical-type CMOS Hall device with improved sensitivity to detect a 3D magnetic field in various types of sensors or communication devices. To improve sensitivity, trenches are implanted next to the current input terminal, so that the Hall current becomes maximum. The effect of the dimension and location of trenches on sensitivity is simulated in the COMSOL simulator. A vertical-type Hall device with a width of 16 μm and a height of 2 μm is optimized for maximum sensitivity. The simulation result shows that it has a 23% better result than a conventional vertical-type CMOS Hall device without a trench.

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