Positive feedback technique and split‐length transistors for DC‐gain enhancement of two‐stage op‐amps

Abstract

This study presents the design and simulation of a fully differential two‐stage op‐amp in a 0.18 μm complementary metal–oxide–semiconductor process with a 1.8 V supply voltage. In this op‐amp, positive feedback technique and split‐length transistors (SLTs) are employed to increase the DC‐gain of the op‐amp by about 22 dB without affecting the unity‐gain bandwidth (UGBW), stability, power dissipation and output voltage swing of the conventional two‐stage op‐amp. A comprehensive analysis is provided for differential‐mode gain, common‐mode gain, power supply rejection ratio, input‐referred noise, input offset, frequency response and the effect of using SLTs on DC‐gain sensitivity. The proposed op‐amp is utilised in a flip‐around sample‐and‐hold amplifier (SHA). The output spectrum of the SHA shows the total harmonic distortion of 0.0023%. The post‐layout and Monte Carlo simulation results show that the proposed op‐amp has better performance than the state‐of‐the‐art designs.

Keywords

• positive feedback technique
• fully differential two-stage op-amp
• split-length transistors
• dc-gain enhancement
• complementary metal-oxide-semiconductor process
• CMOS process