Scalable QKD Postprocessing System With Reconfigurable Hardware Accelerator

Abstract

Key distillation is an essential component of every quantum key distribution (QKD) system because it compensates for the inherent transmission errors of a quantum channel. However, the interoperability and throughput aspects of the postprocessing components are often neglected. In this article, we propose a high-throughput key distillation framework that supports multiple QKD protocols, implemented in a field-programmable gate array (FPGA). The proposed design adapts a MapReduce programming model to efficiently process large chunks of raw data across the limited computing resources of an FPGA. We present a novel hardware-efficient integrated postprocessing architecture that offers dynamic error correction, mutual authentication with a physically unclonable function, and an inbuilt high-speed encryption application that utilizes the key for secure communication. In addition, we have developed a semiautomated high-level synthesis framework that is compatible with any discrete variable QKD system, showing promising speedup. Overall, the experimental results demonstrate a noteworthy enhancement in scalability achieved through the utilization of a single FPGA platform.

Keywords

• High-level synthesis (HLS)
• key distillation engine (KDE)
• MapReduce framework
• physical unclonable function (PUF)
• quantum key distribution (QKD)