Evolutionary Optimization Techniques in Analog Integrated Circuit Designs
Trang Hoang,
Bao Quoc Bui,
Hoang Trong Nguyen,
Phuc That Bao Ton
Affiliations
Trang Hoang
Ho Chi Minh City University of Technology, VNU HCM
Bao Quoc Bui
Department of Electronics Engineering, Ho Chi Minh City University of Technology (HCMUT), Vietnam National University Ho Chi Minh City (VNU-HCM), Vietnam
Hoang Trong Nguyen
Department of Electronics Engineering, Ho Chi Minh City University of Technology (HCMUT), Vietnam National University Ho Chi Minh City (VNU-HCM), Vietnam
Phuc That Bao Ton
Department of Electronics Engineering, Ho Chi Minh City University of Technology (HCMUT), Vietnam National University Ho Chi Minh City (VNU-HCM), Vietnam
The proposed genetic algorithm (GA) and particle swarm optimization (PSO) applied for the optimal design of a one-stage operational amplifier circuit with a current mirror load are studied in this work. The sizes of transistors are optimized using the proposed GA and PSO for improved areas and performance parameters of the circuit. A number of performance parameters are collected from the data set created by GA and PSO to optimize the size of transistors and other design parameters. The Spectre simulator is chosen for the simulation of circuit parameters to obtain necessary for the GA and PSO algorithm. Post-optimization results justify that the proposed GA and PSO methods are competitive with differential evolution regarding convergence speed, design specifications, and the optimal CMOS one-stage operational amplifier circuit parameters.