Design Considerations for Autocalibrations of Wide-Band ΔΣ Fractional-N PLL Synthesizers

Abstract

Autocalibration of VCO frequency and loop gain is an essential process in PLL frequency synthesizers. In a wide tuning-range fractional-N PLL frequency synthesizer, high-speed and high-precision automatic calibration is especially important for shortening the lock time and improving the phase noise. This paper reviews the design issues of the PLL auto-calibration and discusses on the limitations of the previous techniques. A very simple and efficient auto-calibration method based on a high-speed frequency-to-digital converter (FDC) is proposed and verified through simulations. The proposed method is highly suited for a very wide-band ΔΣ fractional-N PLL.