IEEE Access (Jan 2019)

A Carry Lookahead Adder Based on Hybrid CMOS-Memristor Logic Circuit

  • Gongzhi Liu,
  • Lijing Zheng,
  • Guangyi Wang,
  • Yiran Shen,
  • Yan Liang

DOI
https://doi.org/10.1109/ACCESS.2019.2907976
Journal volume & issue
Vol. 7
pp. 43691 – 43696

Abstract

Read online

Memristor-based digital logic circuits open new pathways for exploring advanced computing architectures, which provide a promising alternative to conventional IC technology. In several memristor-based logic design methods, the memristor ratioed logic (MRL) is compatible with traditional CMOS technology. Two kinds of carry-lookahead adders (CLA) based on the hybrid CMOS-memristor structure are proposed, within which one is based on MRL logic, and the other is an improved one that is implemented by MRL universal gate (MRLUG). The proposed CLAs are verified by theoretical analyses and simulations, showing that the proposed design method requires fewer memristors and CMOSs than the IMP-based or CMOS-based CLAs, which means smaller circuit size and lower power consumption.

Keywords