HERIC-Clamped and PN-NPC Inverters With Five-Level Output Voltage and Reduced Grid-Interfaced Filter Size

Abstract

Transformerless grid-connected inverters with highly efficient and reliable inverter concept (HERIC) and positive-negative neutral point-clamped (PN-NPC) circuit configurations exhibit excellent performance in terms of overall efficiency, common-mode voltage, and alleviated leakage current concern. These inverters are designed to generate only a three-level (3L) output voltage waveform, thereby reducing the power density of a conversion system. On the other hand, it is well-known that increasing the inverter output voltage levels entails the reduction of the output filter size. In this regard, this article aims to develop a five-level (5L) inverter output voltage for the improved versions of HERIC-clamped and original PN-NPC inverters. This is achieved with either phase-shifted or level-shifted pulse width modulation technique leading to further quality improvement of ac voltage and current waveforms through increasing the number of output voltage levels. Therefore, a much smaller output filter size can be utilized, while the overall efficiency of the entire system is enhanced. Two laboratory-built SiC-based prototypes for both the proposed HERIC-clamped (1.8 kW) and PN-NPC-5L (2 kW) inverters have been fabricated to show the feasibility and effectiveness of the proposed solution via experiments.

Keywords

• HERIC-clamped inverter
• multilevel inverters
• PN-NPC inverter
• pulse width modulation (PWM)