Nano Express (Jan 2023)

Enhanced electrodynamic gating in two-dimensional transistors using ferroelectric capping

  • Hemendra Nath Jaiswal,
  • Maomao Liu,
  • Simran Shahi,
  • Anthony Cabanillas,
  • Sichen Wei,
  • Yu Fu,
  • Anindita Chakravarty,
  • Asma Ahmed,
  • Joel Muhigirwa,
  • Fei Yao,
  • Huamin Li

DOI
https://doi.org/10.1088/2632-959X/acd5ed
Journal volume & issue
Vol. 4, no. 3
p. 035002

Abstract

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Two-dimensional (2D) materials such as semiconductors and ferroelectrics are promising for future energy-efficient logic devices because of their extraordinary electronic properties at atomic thickness. In this work, we investigated a van der Waals heterostructure composited of 2D semiconducting MoS _2 and 2D ferroelectric CuInP _2 S _6 (CIPS) and NiPS _3 . Instead of using 2D ferroelectrics as conventional gate dielectric layers, here we applied CIPS and NiPS _3 as a ferroelectric capping layer, and investigated a long-distance coupling effect with the gate upon the sandwiched 2D MoS _2 channels. Our experimental results showed an outstanding enhancement of the electrodynamic gating in 2D MoS _2 transistors, represented by a significant reduction of subthreshold swing at room temperature. This was due to the coupling-induced polarization of 2D ferroelectrics at 2D semiconductor surface which led to an effective and dynamic magnification of the gate capacitance. Meanwhile, the electrostatic gating was remained steady after adding the ferroelectric capping layer, providing ease and compatibility for further implementation with existing circuit and system design. Our work demonstrates the long-distance coupling effect of 2D ferroelectrics in a capping architecture, reveals its impacts from both electrodynamic and electrostatic perspectives, and expands the potential of 2D ferroelectrics to further improve the performance of energy-efficient nanoelectronics.

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