HIL Experimental Analyses of Satellite Electrical Power Subsystem (EPS) in De-tumbling Mode

Abstract

In this study, hardware in the loop (HIL) simulation consisting of solar array simulator, programmable electric load, charger board, distribution board and attitude and position simulator is designed and developed for the mentioned purpose. Because of satellite high angular velocity in de-tumbling mode, it is not possible to perform the experimental tests for power consumption analysis. Electricalpower HIL can be used for modifying, redesigning, and verification of the electricalpower subsystem design. The power consumption of communications satellite components is simulated in a de-tumbling mode. De-tumbling mode of operation is implemented in HIL test bed and the experimental results are extracted. The results consisting of battery voltage, battery capacity, current, depth of discharge and voltage stability are investigated. The results of this paper can be useful in the design, implementation and verification of electrical power subsystem for a wide range of satellites from LEO to GEO.

Keywords

• communication satellite
• electricalpower subsystem
• de-tumbling mode
• hardware in loop