Design of SRAM with CNFET based on ternary literal circuit

Abstract

Based on the analysis of the literal circuit and ternary memorizer, a ternary SRAM design method is proposed, which integrates with literal circuit and the CNFET. Firstly, the literal circuit is designed by literal circuit truth table and switch-signal theory. According to literal circuit, the ternary SRAM cell is achieved. Moreover, the technique of transmission gate control feedback loop is used to reduce dynamic power during write operation. The experiment result shows that the proposed circuit has proper functionality. Comparing with cross-coupling structure SRAM, the designed circuit improves about 49.2% in writing speed.

Keywords

• multi-valued logic
• ternary SRAM
• literal circuit
• CNFET