AIP Advances (May 2018)

Interconnected magnetic tunnel junctions for spin-logic applications

  • Mauricio Manfrini,
  • Adrien Vaysset,
  • Danny Wan,
  • Eline Raymenants,
  • Johan Swerts,
  • Siddharth Rao,
  • Odysseas Zografos,
  • Laurent Souriau,
  • Khashayar Babaei Gavan,
  • Nouredine Rassoul,
  • Dunja Radisic,
  • Miroslav Cupak,
  • Morin Dehan,
  • Safak Sayan,
  • Dmitri E. Nikonov,
  • Sasikanth Manipatruni,
  • Ian A. Young,
  • Dan Mocuta,
  • Iuliana P. Radu

DOI
https://doi.org/10.1063/1.5007622
Journal volume & issue
Vol. 8, no. 5
pp. 055921 – 055921-6

Abstract

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With the rapid progress of spintronic devices, spin-logic concepts hold promises of energy-delay conscious computation for efficient logic gate operations. We report on the electrical characterization of domain walls in interconnected magnetic tunnel junctions. By means of spin-transfer torque effect, domains walls are produced at the common free layer and its propagation towards the output pillar sensed by tunneling magneto-resistance. Domain pinning conditions are studied quasi-statically showing a strong dependence on pillar size, ferromagnetic free layer width and inter-pillar distance. Addressing pinning conditions are detrimental for cascading and fan-out of domain walls across nodes, enabling the realization of domain-wall-based logic technology.