e-Prime: Advances in Electrical Engineering, Electronics and Energy (Mar 2024)
Design and analysis of low power high speed SBFF and MBFF for signal processing applications
Abstract
Power dissipation accounts for high-performance digital systems in the deep sub-micron region. As a result, power within compact systems is vital. This paper investigates four distinct kinds of MBFF using conventional CMOS, PTL, TG, and GDI logic. In this work, a novel low-power high-speed master slave SBFF and MBFF are proposed. The recommended flip-flop design incorporates distinct latches for the master and slave components. The recommended flip-flop circuitry comprises master and slave circuits utilizing 7 PMOS and 11 NMOS transistors. The reduction in complexity is achieved by utilizing a smaller quantity of PMOS transistors. As a result, this design yields a flip-flop that is both high-speed and area-efficient. The proposed circuit under consideration functions with a singular clock. It comprises only four transistors that receive the clock signal as input—the proposed SBFF architecture comprises six inverters implemented using the Gate Diffusion Input (GDI) approach. The design of the existing and proposed SBFFs and MBFFs are simulated using 45 nm CMOS technology with Mentor Graphics EDA software. The study encompasses a wide range of process variables, including adjustments in supply voltage spanning from 0.8 V to 1.0 V and temperature changes that vary from −25 °C to 75 °C. The suggested design of the SBFF demonstrates a reduction in delay of at least 83 % and a decrease in PDP of 75 % compared to earlier reported designs. Furthermore, the proposed SBFF design accomplishes a comprehensive voltage swing by utilizing 18 transistors. The MBFF architecture under consideration demonstrates a reduction in delay of at least 79 % and a decrease in PDP of 65 % compared to earlier reported methods. Furthermore, the MBFF architecture that has been proposed successfully achieves a comprehensive voltage swing utilizing a mere 36 transistors.