A Unified NVRAM and TRNG in Standard CMOS Technology

Abstract

True Random Number Generator (TRNG) provides the different keys for device authentication and cryptography. Typically, the TRNG is implemented in a standalone module into the systems, increasing the complexity and area of the implementation. In addition, the system needs to store the key generated by the TRNG in non-volatile memory for the different applications. However, implementing a Non-Volatile Random Access Memory (NVRAM) requires additional technology features, usually unavailable or expensive. This paper presents a unified NVRAM-TRNG in a $0.18\mu m$ standard CMOS technology without an additional mask or fabrication steps. The unified implementation does not need additional circuits for the random number generation mode. The differential NVRAM bit cell is implemented using a high voltage transistor to resist the non-volatile memory application. The NVRAM presents times of 15-ms of programming and erasing and 20-ns of reading functions. The bit cell needs a voltage of 8.5-V for the programming and erasing functions. The TRNG implemented passes the NIST SP800-22 statistical test and NIST SP800-90B entropy test with a 0.9859 minimum entropy. The entropy and statistical test are applied with Process, Voltage, and Temperature (PVT) variations. The implementation occupies a 476- $\mu m^{2}$ with 14.69- $10^{3} F^{2}$ of area normalized. Besides, the NVRAM bit cell in TRNG mode shows a bit rate of 50-Mbps. Finally, the implementation as TRNG reports a 49.5- $\mu W$ power consumption with 0.99-pJ/bit energy efficiency, respectively.

Keywords

• TRNG
• NVRAM
• NIST