Electronics Letters (Sep 2023)

A sub‐6GHz wideband low noise amplifier with high gain and low noise figure in 110‐nm SOI CMOS

  • Xiaowei Wang,
  • Zhiqun Li,
  • Tong Xu

DOI
https://doi.org/10.1049/ell2.12942
Journal volume & issue
Vol. 59, no. 17
pp. n/a – n/a

Abstract

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Abstract This letter presents a sub‐6 GHz wideband low noise amplifier (LNA) based on a double L‐type load network and utilizes the negative feedback technique. Using the cascode structure, along with the aforementioned techniques, it is possible to achieve a single‐stage wideband LNA with high gain and low noise figure (NF). Fabricated in 110‐nm SOI CMOS technology, the proposed LNA achieves a maximum power gain of 15.2 dB, noise figure of 1.0–1.56 dB. The 3‐dB bandwidth ranges from 3.05 to 4.55 GHz. The minimum power input at 1 dB compression point (IP1dB) is −17.1 dBm. The LNA area is 0.18 mm2 and dissipates a total power of 11.5 mW from a 1.4‐V power supply.

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