IEEE Access (Jan 2024)

Design-Oriented Single-Piece 5-DC-Parameter MOSFET Model

  • Deni Germano Alves Neto,
  • Mohamed Khalil Bouchoucha,
  • Gabriel Maranhao,
  • Manuel J. Barragan,
  • Marcio Cherem Schneider,
  • Andreia Cathelin,
  • Sylvain Bourdel,
  • Carlos Galup-Montoro

DOI
https://doi.org/10.1109/ACCESS.2024.3417316
Journal volume & issue
Vol. 12
pp. 87420 – 87437

Abstract

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This paper presents a novel charge-based MOSFET model, denoted ACM2, including velocity saturation and drain-induced barrier lowering. Employing the proposed model, all the DC characteristics (currents and charges) and the small-signal equations can be expressed as single-piece expressions valid in all inversion (weak, moderate, and strong) regions. When applied to bulk technology, ACM2 has 5 DC parameters, and an extra parameter is included for SOI technologies to account for back gate bias. Straightforward procedures are provided for extracting the short-channel parameters associated with velocity saturation and back gate bias. Experimental results demonstrate that the DC and small-signal characteristics of the ACM2 model match the silicon measurements in bulk and SOI technologies, with typical errors of less than $20~\%$ in the DC currents and $30~\%$ in the transconductances. The validity of the model is further verified with two design examples. Firstly, simulations of a CMOS inverter in a 130 nm bulk technology show similar results using the PSP or ACM2 models. Then, an RF design example is provided. The ACM2 model is employed to design a 2.4 GHz low-noise-amplifier in a 28 nm FD-SOI CMOS technology. Obtained results in terms of $S_{11}$ , $S_{21}$ , NF, and IIP3 are consistent with simulations using the complete UTSOI2 model provided in the technology design kit.

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