Single channel pipelined variable-length FFT processor design

Abstract

In this study, a single channel pipelined variable-length fast Fourier transformation (FFT) processor design is presented. With the development of science and technology, digital signal processing has been widely used in many fields. The most basic algorithm of digital signal processing theory, FFT, is widely used in radar signal processing, remote sensing, image processing, communications and other fields. A high real-time and high-throughput FFT processor design method based on the field-programmable gate array (FPGA) platforms is proposed to meet the needs of the synthetic aperture radar imaging digital signal processing. The authors conducted the ISE synthesis based on the Xilinx FPGA platform using xc6vlx760ff1760-1 as the target chip and the ModelSim simulation, combined with Matlab, to verify the correctness of this design.

Keywords

• radar imaging
• field programmable gate arrays
• synthetic aperture radar
• digital signal processing chips
• fast fourier transforms
• pipeline processing
• digital signal processing theory
• field-programmable gate array platforms
• single channel pipelined variable-length fft processor design
• synthetic aperture radar imaging
• xilinx fpga platform
• single channel pipelined variable-length fast fourier transform processor design
• real-time fft processor design method
• high-throughput fft processor design method
• ise synthesis
• xc6vlx760ff1760-1 chip
• modelsim simulation