SSPRD: A Shared-Storage-Based Hardware Packet Reordering and Deduplication System for Multipath Transmission in Wide Area Networks

Abstract

To increase bandwidth and overcome packet loss in Wide Area Networks (WANs), per-packet multipath transmission and redundant transmission are increasingly being used as Software-Defined Wide Area Network (SD-WAN) solutions. However, this results in out-of-order and duplicate packets in the destination network. To restore sequential and unique data streams for multiple connections, hardware packet buffers with significant depth are required due to the large delay difference between WAN paths. To address this issue, SSPRD, a shared-storage-based packet reordering and deduplication system using a Field-Programmable Gate Array (FPGA), is proposed. The storage space for packets and sub-buffers is shared by all sessions with dynamic allocation. Packets are stored in the DDR and are sorted by their descriptors in the buffers. We also develop a sub-buffer-based timeout event handling algorithm. While supporting four sessions, SSPRD achieves a deep reorder buffer on hardware, with a depth of up to 15,360 packets per session. Compared with other solutions, SSPRD reduces buffer space usage by 62.5%, and reaches a packet reordering and deduplicating performance of 10 Gbps for 1500-byte packets.

Keywords

• packet reordering
• multipath transmission
• WAN
• FPGA