AIP Advances
(Oct 2021)
1.2 kV reverse blocking Schottky-drain Si–GaN monolithic integrated cascode FET
Jiaqi Zhang,
Weihang Zhang,
Jing Wan,
Guofang Yang,
Yichang Wu,
Ya’nan Cheng,
Yachao Zhang,
Dazheng Chen,
Shenglei Zhao,
Jincheng Zhang,
Chunfu Zhang,
Yue Hao
Affiliations
Jiaqi Zhang
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Weihang Zhang
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Jing Wan
State Key Laboratory of ASIC and System, School of Information Science and Engineering, Fudan University, Shanghai 200433, China
Guofang Yang
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Yichang Wu
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Ya’nan Cheng
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Yachao Zhang
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Dazheng Chen
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Shenglei Zhao
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Jincheng Zhang
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Chunfu Zhang
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
Yue Hao
State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology, School of Microelectronics, Xidian University, Xi’an 710071, China
DOI
https://doi.org/10.1063/5.0066189
Journal volume & issue
Vol. 11,
no. 10
Abstract
Read online
In this work, a novel reverse blocking Schottky-drain Si–GaN monolithic integrated cascode FET was realized for the first time by using transfer printing and self-aligned etching technology. The threshold voltage is up to 4.5 V, which meets the needs of the power electronic system. The on-resistance is 57.1 Ω mm, and the on-voltage is 1.1 V. The forward/reverse breakdown voltage (at 10 µA/mm) reaches 1325/−1240 V for LGD = 18 µm. The mechanism of reverse blocking is proposed and analyzed from the point of view of circuits. In addition, the correctness of the mechanism is verified by simulation and experiment.
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