Design of low-power D-flip-flop based on multithreshold technique(基于多阈值技术的低功耗D触发器设计)

ZHANGHui-xi(张慧熙); SHENJi-zhong(沈继忠); GUXiao-yan(顾晓燕)

doi:zjup/1008-9497.2005.32.2.165-168

Zhejiang Daxue xuebao. Lixue ban (Mar 2005)

Design of low-power D-flip-flop based on multithreshold technique(基于多阈值技术的低功耗D触发器设计)

ZHANGHui-xi(张慧熙),
SHENJi-zhong(沈继忠),
GUXiao-yan(顾晓燕)

Affiliations

ZHANGHui-xi(张慧熙): Department of Information and Electronic Engineering, Zhejiang University, Hangzhou 310028, China(浙江大学信息与电子工程学系，浙江杭州 310028)
SHENJi-zhong(沈继忠): Department of Information and Electronic Engineering, Zhejiang University, Hangzhou 310028, China(浙江大学信息与电子工程学系，浙江杭州 310028)
GUXiao-yan(顾晓燕): Department of Information and Electronic Engineering, Zhejiang University, Hangzhou 310028, China(浙江大学信息与电子工程学系，浙江杭州 310028)

DOI
Journal volume & issue: Vol. 32, no. 2
pp. 165 – 168

Abstract

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目前CMOS电路中，漏电流功耗已经成为不可忽视的部分.降低电路漏电流功耗的一种有效方法是采用多阈值电路技术.根据多阈值电路设计原理，电路的关键路径采用低阈值晶体管，以保证电路的性能；非关键路径采用高阈值晶体管，以降低电路的漏电流功耗.对于触发器来说，其对时钟的响应部分是一个关键路径，而对信号的响应部分是非关键路径.本文据此设计了一种新型低功耗D触发器——多阈值与非门保持型D触发器.该电路结构简单，降低了电路漏电流功耗，并且当输入保持不变时，时钟信号不作用于内部结点，使内部结点电压保持不变，这进一步降低了电路的功耗.模拟结果表明所设计的D触发器跟传统的D触发器相比，可节省近25% 的功耗.

Published in Zhejiang Daxue xuebao. Lixue ban

ISSN: 1008-9497 (Print)
Publisher: Zhejiang University Press
Country of publisher: China
LCC subjects: Science: Mathematics: Instruments and machines: Electronic computers. Computer science; Science: Physics
Website: https://www.zjujournals.com/sci/EN/1008-9497/home.shtml

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