Voltage Balancing Strategy for V-Clamp Multilevel Converter Under High Modulation Index and High Power Factor Condition

Abstract

Featured with the simple structure, V-clamp multilevel converter (VMC) shows good prospect in the high-voltage and high-power applications. But VMC is endangered by the deviation of dc-link capacitors voltage, especially under the high modulation index (MI) and high power factor (PF) condition. Thus, a voltage balancing strategy for three-phase seven-level VMC is proposed in this paper. This strategy re-designs the carriers and reference to achieve capacitors voltage balancing with reduced switching actions. Besides, an active compensation control for capacitors voltage is presented to improve the dynamic performance. Compared with the conventional virtual space vector modulation, the proposed strategy significantly reduces the switching loss while provides a better output voltage under the high MI and high PF condition. The simulation model and experimental prototype of VMC with 7.2kW/220V are constructed to verify the validity of the proposed strategy.

Keywords

• V-clamp multilevel converter
• carrier-based modulation
• capacitor voltage balancing
• reduce switching loss