FPGA BASED 2×2 MMSE MIMO-OFDM SYSTEM USING XILINX SYSTEM GENERATOR

Abstract

Multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) is a powerful technique to increase the capacity of wireless communication system and decrease the effect of selective fading to flat fading channel. In this paper 2×2 MIMO-OFDM system is implemented using Xilinx system generator (XSG). Simple MMSE equalizer is implemented at the receiver to detect the signal over MIMO channel. The following features are implemented and added to the proposed system: increasing security of the system using chaos based scrambling, using 16-ADQAM modulation to solve the ambiguity problem and implement FFT in pipelining method. The results show that the original data is recovered successfully at the receiver. The VHDL code file is generated for this system for Xilinx Virtex-4 device for hardware implementation purposes. The system is routed in successfully using ISE 14.1 program with resources of 21% slices Flip Flop, 57% LUT, 71% occupied slices and 87% DSP 48s numbers from the selected device. The Xilinx system generator is more flexible, easier, and reliable and gives optimum design for FPGA technique comparing with conventional FPGA design.

Keywords

• MIMO
• OFDM
• MMSE
• ADQAM
• FPGA
• chaos based PRBG