Study on Single Event Effect of SiC JFET Based on Experiment and Simulation

Abstract

The rapid growth of China’s aerospace sector, along with the creation of expansive space configurations like space stations, and the integration of high-performance electric propulsion systems require power semiconductor devices of increasingly better performance. Consequently, it is vital to achieve a breakthrough in the research of radiation-resistant SiC high-voltage power devices. Various bias voltages were applied to SiC JFET devices and subsequent heavy-ion irradiation experiments were conducted. These experiments reveal the existence of two failure modes: single event leakage degradation and single event burnout (SEB), which are similar to those found in SiC MOSFET. However, due to the lack of an irradiation-sensitive gate oxide structure, the onset of leakage degradation is higher in SiC JFET than in SiC MOSFET. This implies that SiC JFET have a larger safe operating region. Single event leakage degradation is observed during heavy-ion irradiation when the drain bias voltage is set to 350 V. The extent of leakage degradation is directly proportional to the absolute value of the drain bias voltage and the quantity of heavy-ion fluence. Additionally, SEB is observed when the heavy-ion irradiation takes place at a drain bias voltage of 400 V. The Sentaurus TCAD simulation study shows that the single event effect can be divided into two phases. The first phase involves heavy-ion irradiation, which is followed by collisional ionisation along the incidence path, resulting in the generation of a large number of carriers. The electric field along the incidence path then produces a current from the drain to the gate. The drain bias voltage was set at 350 V, causing the P+ gate area and the PN end of the N- drift area to reach a temperature of 2 500 K due to the high-density current. It is possible that thermal stresses are responsible for the leakage degradation. The modulation of the electric field in the second stage leads to an increase in the electric field at the junction of the N+ substrate and the N- drift region, reaching up to 3.2 MV/m. This strong electric field persists for a significant period and results in substantial collision ionisation. As a consequence, the local temperature at the junction of the N+ substrate and N- drift region continues to rise to 3 000 K. Exceeding the sublimation temperature of SiC material results in SiC JFET device burnout. Adding a buffer layer at the junction of the N+ substrate and N- drift region may enhance the SEB threshold voltage of SiC JFET. This study guides radiation reinforcement of SiC JFET devices and supports the application of SiC power devices in space environments.

Keywords

• sic jfet
• single event effect
• single event burnout
• heavy-ion irradiation