A 55-65 GHz Internal Differentially Matched Silicon Power Amplifier With Spirally Folded 1:2 Balun

Wei Ping Cao; Jinxin Li; Wen-Bin Ye; Jiang-An Han

doi:10.1109/ACCESS.2019.2897577

IEEE Access (Jan 2019)

A 55-65 GHz Internal Differentially Matched Silicon Power Amplifier With Spirally Folded 1:2 Balun

Wei Ping Cao,
Jinxin Li,
Wen-Bin Ye,
Jiang-An Han

Affiliations

Wei Ping Cao: Key Laboratory of Cognitive Radio and Information Processing, Ministry of Education, Guilin University of Electronic Technology, Guilin, China
Jinxin Li: College of Computer Science of Electronic Engineering, Hunan University, Changsha, China
Wen-Bin Ye: ORCiD; School of Electronic Science and Technology, Shenzhen University, Shenzhen, China
Jiang-An Han: ORCiD; Microsystem and Terahertz Research Center, Institute of Electronic Engineering, China Academy of Engineering Physics, Mianyang, China

DOI: https://doi.org/10.1109/ACCESS.2019.2897577
Journal volume & issue: Vol. 7
pp. 20076 – 20082

Abstract

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A 55-65-GHz CMOS high power amplifier (PA) is designed with the help of a spirally folded 1:2 balun. By this size-folded balun, balance-unbalanced conversion and high-power combination are accomplished concurrently. Within the internal of PA, differential signal pairs benefit simplification of inter-stage matching topologies. The designed three-stage PA offers above 16.3-dB gain from 55.1 to 65.0 GHz. It is able to deliver 17.8-dBm output referred 1-dB compression point (P1 dB) and 22.2-dBm saturated output power (Psat) with a peak power-added efficiency of 10.9%.

Published in IEEE Access

ISSN: 2169-3536 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639

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