A Novel Trust Evaluation Method for Logic Circuits in IoT Applications Based on the E-PTM Model

Abstract

The increase in the reliability requirements of integrated circuits applied in diverse smart sensing devices and the increase in the cost of test generation and fault simulation have expanded the need for new approaches to estimate signal reliability in logic circuits, which will help trust management of Internet of Things smart systems. This paper presents a novel method for reliability analysis in logic circuits with unreliable devices for application in trust-driven design. Based on the extended probabilistic transfer matrix model with binary-decimal coding allocation, by using the technologies of state-vector expansion and matrix reconstruction, the proposed method evaluates the quality of a reliability improvement for trust-driven design applications, while maintaining high computational accuracy, in early stages of circuit design. This efficiency is possible, because the proposed method is always computed in units of basic gates and the reliability can be output by an observable matrix with hybrid coding. Simulation results on benchmark circuits show that the proposed method is an accurate and fast method with less complexity and will contribute to the dynamic analysis of circuit reliability in circuit design.

Keywords

• Binary-decimal code
• state-vector expansion
• matrix reconstruction
• extended probabilistic transfer matrix model
• circuit reliability (trust)