The implementation of the clustered‐OFDM‐based transceiver on an FPGA device: A comprehensive comparison

Abstract

Abstract Aiming at reducing hardware complexity and power consumption of multicarrier‐based broadband transceivers, this contribution discusses and analyzes the implementation of clustered‐orthogonal frequency division multiplexing (OFDM)‐based transceiver in a field programmable gate array (FPGA) device. In this sense, several OFDM schemes covering baseband and passband data communications are implemented. The hardware resource utilization and power consumption related to each scheme, after being implemented in the FPGA device, are discussed and compared. Numerical results show that the OFDM scheme based on P(·)‐II and Q(·)‐III, which is a modified version of the hermitian symmetric (HS)‐OFDM scheme, which performs both baseband and passband data communications, demands the lowest hardware resource utilization and power consumption, reducing to 1/3 the hardware resource utilization. As a result, P(·)‐II and Q(·)‐III constitute an interesting candidate for implementing new generations of high data rate, low hardware resource utilization, and low‐power consumption clustered‐OFDM‐based transceivers for broadband data communication. Last but not least, numerical results show that the controllers used to integrate all components of a clustered‐OFDM‐based transceiver can demand sizeable hardware resource utilization and power consumption and, therefore, they have to be carefully designed.

Keywords

• Logic circuits
• Modulation and coding methods
• Power line systems
• Radio links and equipment